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8 Mbit 1.8V SPI Serial Flash
A Microchip Technology Company
SST25WF080
Not Recommended for New Designs
Auto Address Increment (AAI)
The Auto Address Increment Programming-Status bit provides status on whether the device is in AAI
programming mode or Byte-Program mode. The default at power up is Byte-Program mode.
Block-Protection (BP3, BP2, BP1, BP0)
The Block-Protection (BP3, BP2, BP1, BP0) bits define the size of the memory area to be software
protected against any memory Write (Program or Erase) operation, see Table 5. The Write-Status-
Register (WRSR) instruction is used to program the BP3, BP2, BP1 and BP0 bits as long as WP# is
high or the Block-Protect-Lock (BPL) bit is ‘0’. Chip-Erase can only be executed if Block-Protection bits
are all ‘0’. After power-up, BP3, BP2, BP1 and BP0 are set to defaults. See Table 4 for defaults at
power-up.
Block Protection Lock-Down (BPL)
When the WP# pin is driven low (V IL ), it enables the Block-Protection-Lock-Down (BPL) bit. When BPL
is set to ‘1’, it prevents any further alteration of the BPL, BP3, BP2, BP1, and BP0 bits. When the WP#
pin is driven high (V IH ), the BPL bit has no effect and its value is ‘Don’t Care’. After power-up, the BPL
bit is reset to ‘0’.
Table 5: Software Status Register Block Protection for SST25WF080
Status Register Bit
Protected Memory Address
Protection Level
None
1 (Upper 16th Memory, Blocks 30 and 31)
2 (Upper 8th Memory, Blocks 28 to 31)
3 (Upper Quarter Memory, Blocks 24 to 31)
4 (Upper Half Memory, Blocks 16 to 31)
5 (Full Memory, Blocks 0 to 31)
BP3 1
X
X
X
X
X
X
X
X
BP2 2
0
0
0
0
1
1
1
1
BP1 2
0
0
1
1
0
0
1
1
BP0 2
0
1
0
1
0
1
0
1
8 Mbit
None
F0000H-FFFFFH
E0000H-FFFFFH
C0000H-FFFFFH
80000H-FFFFFH
00000H-FFFFFH
T5.1 25024
1. X = Don’t Care (Reserved), default is ‘0’.
2. Default at power-up for BP2, BP1 and BP0 is ‘11’.
?2012 Silicon Storage Technology, Inc.
10
DS25024B
03/12
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